SoC Physical Design Engineer

SoC Physical Design Engineer

RACYICS GmbH

Physical Design
SoC
EDA tools
CAD tools
RTL2GDS
verification
timing analysis

Zusammenfassung

Racyics GmbH poszukuje Inżyniera Fizycznego Projektowania SoC. Obowiązki obejmują projektowanie i weryfikację SoC. Wymagana jest znajomość technologii CMOS. Oferowane są elastyczne godziny pracy i wsparcie finansowe dla kosztów wychowania dzieci.

Schlüsselwörter

Physical DesignSoCEDA toolsCAD toolsRTL2GDSverificationtiming analysis

Vorteile

  • elastyczne godziny pracy
  • możliwość pracy zdalnej
  • współfinansowanie kosztów opieki nad dzieckiem
  • świetne wydarzenia zespołowe

Stellenbeschreibung

About us:

Extending our international team, we are looking for a SoC Physical Design Engineer (Entry-Level).

Racyics® is Europe's leading design service provider for mixed-signal system-on-chip design and turnkey services in advanced nodes.

We deliver professional analog, digital and mixed-signal design services tailored to the customers' needs with focus on realization of complex System-on-Chips in leading edge technology nodes. Our team of more than 100 employees covers the complete chip design process up to system architecture development. Racyics is working for major German and international semi-custom companies both as a service provider and in collaborative partnerships.

Job Description:

  • Contribute to physical design, implementation and verification of complex digital and mixed signal SoCs
  • Implementation according to customer requirements using state-of-the-art EDA tools and flows
  • Support individual steps in RTL2GDS flow like Synthesis, P&R, Physical Verification, EMIR, Equivalence Check or Static Timing Analysis
  • Address challenges in designing SoCs in leading edge Technologies
  • Contribute to methodology developments with proposals and implementation of flow and methodology enhancements

Your profile

Requirements:

  • Bachelor's/Master's Degree in Electrical Engineering or Information Technology or similar
  • Experience in Physical Implementation in leading edge CMOS technologies
  • Basic knowledge of state-of-the-art synthesis, P&R and verification tools from Cadence, Synopsys, Ansys and Mentor
  • Self-driven and hands-on way of working
  • Strong analytical and solution-oriented thinking
  • Good written and oral communication skills in English
  • Team-player

A plus would be:

  • Experience with Digital-IC-EDA tools from Cadence, Synopsys and Siemens
  • Experience in RTL2GDS in leading edge CMOS and/or FDSOI technologies
  • Knowledge in timing modelling and timing analysis for digital designs
  • Good written and oral communication skills in German

We offer

Location:

Dresden, Germany
Duisburg, Germany
Frankfurt/Main, Germany

Employment Type:

Full-time (up to 40 hours per week)

Working at Racyics comes with many benefits, including flexible working hours, mobile work, a financial contribution to your childcare costs and great team events.

Contact

Contact:

Send us a mail with your CV incl. your certificates, transcripts etc. attached to [email protected]. Please mind that we can only consider attachments in PDF format. Contact

Racyics GmbH
Bergstraße 56
01069 Dresden
Germany

phone+49 (0)351 41 88 72-0print+49 (0)351 41 88 [email protected]

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